Recently, there has been proposed a three-dimensional semiconductor integrated circuit utilizing a through silicon via (TSV) as a method to reduce an increase in wiring delay while also increasing a degree of semiconductor integrated circuit integration.
The through silicon via denotes a via penetrating stacked chips (i.e., semiconductor substrates) as a known interface technology by which semiconductor integrated circuits formed in chips are mutually connected.
In the present specification, a chip to be a target to which a through silicon via is arranged is not limited to silicon (Si) regardless of the description of a through silicon via.
Compared to a bonding wire, with a through silicon via, parasitic resistance and parasitic capacity relevant to an interface can be suppressed to be low while the number of chips being mounted within a single package can be increased. Accordingly, it is also effective for high speed operation.
Incidentally, the wiring width of a semiconductor integrated circuit is 1 μm or less, owing to the miniaturization progress. On the other hand, in consideration of the alignment accuracy among chips, a through silicon via is to be sized within a range between several micrometers and several tens of micrometers. Further, naturally, a semiconductor integrated circuit cannot be formed in an area to which a through silicon via is formed.
Accordingly, through silicon vias cause a problem that the area in which semiconductor integrated circuits can be formed is decreased with the increase of the number of the through silicon vias.
A multiplex transmission technology is easily conceived as a technology to solve the above problem.
The multiplex transmission technology involves a type of pulse-amplitude modulation to indicate the amplitude of a digital signal with potential levels, and not with binary of “low (L)” and “high (H)”. For example, two-bit binary data can be expressed as one signal having four potential levels.
In order to generate multi-leveled data from binary data with the multiplex transmission technology of the related art, all of the binary data to be multi-leveled is collected to one place and is input to one conversion circuit.
Accordingly, for a three-dimensional semiconductor integrated circuit utilizing a through silicon via with an assumed model which converts binary data from semiconductor integrated circuits in stacked different chips into multi-leveled data and which further transmits the multi-leveled data to another chip, the above multiplex transmission technology becomes meaningless.
Specifically, in order to collect binary data from semiconductor integrated circuits in chips to one place, a through silicon via is separately required therefore. That is, since a through silicon via is required to be newly disposed for generating multi-leveled data, the effect of reducing the number of through silicon vias owing to multiplex transmission is cancelled out thereby.
Further, there has been known a technology to perform multiplex transmission with current levels. However, in this case as well, a similar problem occurs as collecting all of binary data to be multi-leveled to one place.
Such a problem occurs with a three-dimensional semiconductor integrated circuit in which stacked chips are mutually connected by a bonding wire not only by a through silicon via.
This is because reducing the number of bonding wires has been a subject for a three-dimensional semiconductor integrated circuit.